The present disclosure generally relates to the cooling of integrated circuit (IC) chips. In particular, this disclosure relates to two-phase embedded cooling of processor chips in a stacked arrangement within a three-dimensional integrated circuit (3-D IC).
During the operation of an IC, electrical power consumed by the IC is dissipated as heat. The amount of heat an IC dissipates can be proportional to its operating voltage(s) and frequency, as well as the number of inputs, outputs, and active circuits within the IC.